FPGA Design Engineer in Romsey
Work as a FPGA Design Engineer in Romsey
Job description
A brief overview below for you:
Location: Romsey 100% onsite, no hybrid working
Duration: 6 months with the option to extend
IR35: Inside IR35
Experience in DSP Algorithm development, FPGA System Design and development for projects using VHDL preferably on Xilinx Zynq, modelling RF Systems
C/C++
Extra information
- Status
- Closed
- Education Level
- Secondary School
- Location
- Romsey
- Type of Contract
- Full Time Jobs
- Profession type
- Scientific Services
- Full UK/EU driving license preferred
- No
- Car Preferred
- No
- Must be eligible to work in the EU
- No
- Cover Letter Required
- No
- Languages
- English
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